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Save another few cycles per multiple

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add_carry took a fixed 8 cycles with a lda/adc/sta pattern

we can instead use bcc to handle the carry-not-set case in just
2 cycles, skipping over the inc which takes 5 cycles on the
carry-is-set case.

Result is 2-7 cycles instead of 8, saving 1-6 cycles twice
per 16-bit multiplication or square.

Neat!
This commit is contained in:
Brooke Vibber 2026-08-22 14:43:17 -07:00
commit 829f46755a
1 changed files with 18 additions and 16 deletions
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34
mandel-core.s
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@ -435,11 +435,13 @@ input_max:
add 4, dest, arg1, arg2 add 4, dest, arg1, arg2
.endmacro .endmacro
; 8 cycles ; 2-7 cycles
.macro add_carry dest .macro add_carry dest
lda dest ; 3 cyc .scope
adc #0 ; 2 cyc bcc after ; 2 cyc
sta dest ; 3 cyc inc dest ; 5 cyc
after:
.endscope
.endmacro .endmacro
; 2 + 9 * byte cycles ; 2 + 9 * byte cycles
@ -771,10 +773,10 @@ inner_loop:
.endproc .endproc
; min base mem: 81 * 4 + 28 * 2 + 10 + 6 = 396 cyc ; min base mem: 81 * 4 + 22 * 2 + 10 + 6 = 384 cyc
; max base mem: 92 * 4 + 28 * 2 + 50 + 6 = 480 cyc ; max base mem: 92 * 4 + 27 * 2 + 50 + 6 = 478 cyc
; min ext-mem: 51 * 4 + 28 * 2 + 10 + 6 = 276 cyc ; min ext-mem: 51 * 4 + 22 * 2 + 10 + 6 = 264 cyc
; max ext-mem: 70 * 4 + 28 * 2 + 50 + 6 = 392 cyc ; max ext-mem: 70 * 4 + 27 * 2 + 50 + 6 = 390 cyc
.macro imul16_impl xe .macro imul16_impl xe
.local arg1 .local arg1
.local arg2 .local arg2
@ -798,11 +800,11 @@ inner_loop:
imul8 inter, arg1 + 1, arg2, xe ; 81-92 or 51-70 imul8 inter, arg1 + 1, arg2, xe ; 81-92 or 51-70
add16 result + 1, result + 1, inter ; 20 cyc add16 result + 1, result + 1, inter ; 20 cyc
add_carry result + 3 ; 8 cyc add_carry result + 3 ; 2-7 cyc
imul8 inter, arg1, arg2 + 1, xe ; 81-92 or 51-70 imul8 inter, arg1, arg2 + 1, xe ; 81-92 or 51-70
add16 result + 1, result + 1, inter ; 20 cyc add16 result + 1, result + 1, inter ; 20 cyc
add_carry result + 3 ; 8 cyc add_carry result + 3 ; 2-7 cyc
; In case of negative inputs, adjust high word ; In case of negative inputs, adjust high word
; https://stackoverflow.com/a/28827013 ; https://stackoverflow.com/a/28827013
@ -819,10 +821,10 @@ arg2_pos:
rts ; 6 cyc rts ; 6 cyc
.endmacro .endmacro
; min base ram: 5 + 19 * 2 + 81 + 28 * 2 + 6 = 186 ; min base ram: 5 + 19 * 2 + 81 + 22 * 2 + 6 = 174
; max base ram: 23 + 19 * 2 + 92 + 28 * 2 + 6 = 215 ; max base ram: 23 + 19 * 2 + 92 + 27 * 2 + 6 = 213
; min ext ram: 5 + 19 * 2 + 51 + 28 * 2 + 6 = 156 ; min ext ram: 5 + 19 * 2 + 51 + 22 * 2 + 6 = 144
; max ext ram: 23 + 19 * 2 + 70 + 28 * 2 + 6 = 193 ; max ext ram: 23 + 19 * 2 + 70 + 27 * 2 + 6 = 191
.macro sqr16_impl xe .macro sqr16_impl xe
.scope .scope
arg = FR0 ; 16-bit arg (clobbered) arg = FR0 ; 16-bit arg (clobbered)
@ -847,9 +849,9 @@ arg2_pos:
imul8 inter, arg + 1, arg, xe ; 81-92 / 51-70 cyc imul8 inter, arg + 1, arg, xe ; 81-92 / 51-70 cyc
add16 result + 1, result + 1, inter ; 20 cyc add16 result + 1, result + 1, inter ; 20 cyc
add_carry result + 3 ; 8 cyc add_carry result + 3 ; 2-7 cyc
add16 result + 1, result + 1, inter ; 20 cyc add16 result + 1, result + 1, inter ; 20 cyc
add_carry result + 3 ; 8 cyc add_carry result + 3 ; 2-7 cyc
rts ; 6 cyc rts ; 6 cyc
.endscope .endscope