diff --git a/mandel-core.s b/mandel-core.s index 5e56e87..a153ff5 100644 --- a/mandel-core.s +++ b/mandel-core.s @@ -435,11 +435,13 @@ input_max: add 4, dest, arg1, arg2 .endmacro -; 8 cycles +; 2-7 cycles .macro add_carry dest - lda dest ; 3 cyc - adc #0 ; 2 cyc - sta dest ; 3 cyc + .scope + bcc after ; 2 cyc + inc dest ; 5 cyc + after: + .endscope .endmacro ; 2 + 9 * byte cycles @@ -771,10 +773,10 @@ inner_loop: .endproc -; min base mem: 81 * 4 + 28 * 2 + 10 + 6 = 396 cyc -; max base mem: 92 * 4 + 28 * 2 + 50 + 6 = 480 cyc -; min ext-mem: 51 * 4 + 28 * 2 + 10 + 6 = 276 cyc -; max ext-mem: 70 * 4 + 28 * 2 + 50 + 6 = 392 cyc +; min base mem: 81 * 4 + 22 * 2 + 10 + 6 = 384 cyc +; max base mem: 92 * 4 + 27 * 2 + 50 + 6 = 478 cyc +; min ext-mem: 51 * 4 + 22 * 2 + 10 + 6 = 264 cyc +; max ext-mem: 70 * 4 + 27 * 2 + 50 + 6 = 390 cyc .macro imul16_impl xe .local arg1 .local arg2 @@ -798,11 +800,11 @@ inner_loop: imul8 inter, arg1 + 1, arg2, xe ; 81-92 or 51-70 add16 result + 1, result + 1, inter ; 20 cyc - add_carry result + 3 ; 8 cyc + add_carry result + 3 ; 2-7 cyc imul8 inter, arg1, arg2 + 1, xe ; 81-92 or 51-70 add16 result + 1, result + 1, inter ; 20 cyc - add_carry result + 3 ; 8 cyc + add_carry result + 3 ; 2-7 cyc ; In case of negative inputs, adjust high word ; https://stackoverflow.com/a/28827013 @@ -819,10 +821,10 @@ arg2_pos: rts ; 6 cyc .endmacro -; min base ram: 5 + 19 * 2 + 81 + 28 * 2 + 6 = 186 -; max base ram: 23 + 19 * 2 + 92 + 28 * 2 + 6 = 215 -; min ext ram: 5 + 19 * 2 + 51 + 28 * 2 + 6 = 156 -; max ext ram: 23 + 19 * 2 + 70 + 28 * 2 + 6 = 193 +; min base ram: 5 + 19 * 2 + 81 + 22 * 2 + 6 = 174 +; max base ram: 23 + 19 * 2 + 92 + 27 * 2 + 6 = 213 +; min ext ram: 5 + 19 * 2 + 51 + 22 * 2 + 6 = 144 +; max ext ram: 23 + 19 * 2 + 70 + 27 * 2 + 6 = 191 .macro sqr16_impl xe .scope arg = FR0 ; 16-bit arg (clobbered) @@ -847,9 +849,9 @@ arg2_pos: imul8 inter, arg + 1, arg, xe ; 81-92 / 51-70 cyc add16 result + 1, result + 1, inter ; 20 cyc - add_carry result + 3 ; 8 cyc + add_carry result + 3 ; 2-7 cyc add16 result + 1, result + 1, inter ; 20 cyc - add_carry result + 3 ; 8 cyc + add_carry result + 3 ; 2-7 cyc rts ; 6 cyc .endscope