Add a copy of the old bit-shift multiplier code

bitmul.s

@@ -0,0 +1,124 @@
+; the old 16-bit bit-and-shift multiplier
+; copied from old code, won't compile as-is
+
+; inner loop for imul16
+; bitnum < 8: 25 or 41 cycles
+; bitnum >= 8: 30 or 46 cycles
+.macro bitmul16 arg1, arg2, result, bitnum
+    .local zero
+    .local one
+    .local next
+
+    ; does 16-bit adds
+    ; arg1 and arg2 are treated as unsigned
+    ; negative signed inputs must be flipped first
+
+    ; 7 cycles up to the branch
+
+    ; check if arg1 has 0 or 1 bit in this place
+    ; 5 cycles either way
+    .if bitnum < 8
+        lda arg1                 ; 3 cyc
+        and #(1 << (bitnum))       ; 2 cyc
+    .else
+        lda arg1 + 1             ; 3 cyc
+        and #(1 << ((bitnum) - 8)) ; 2 cyc
+    .endif
+    bne one ; 2 cyc
+
+zero: ; 18 cyc, 23 cyc
+    lsr result + 3 ; 5 cyc
+    jmp next       ; 3 cyc
+
+one: ; 32 cyc, 37 cyc
+    ; 16-bit add on the top bits
+    clc            ; 2 cyc
+    lda result + 2 ; 3 cyc
+    adc arg2       ; 3 cyc
+    sta result + 2 ; 3 cyc
+    lda result + 3 ; 3 cyc
+    adc arg2 + 1   ; 3 cyc
+    ror a          ; 2 cyc - get a jump on the shift
+    sta result + 3 ; 3 cyc
+next:
+    ror result + 2 ; 5 cyc
+    ror result + 1 ; 5 cyc
+    .if bitnum >= 8
+        ; we can save 5 cycles * 8 bits = 40 cycles total by skipping this byte
+        ; when it's all uninitialized data
+        ror result ; 5 cyc
+    .endif
+
+.endmacro
+
+; 5 to 25 cycles
+.macro check_sign arg
+    ; Check sign bit and flip argument to postive,
+    ; keeping a count of sign bits in the X register.
+    .local positive
+    lda arg + 1   ; 3 cyc
+    bpl positive  ; 2 cyc
+    neg16 arg     ; 18 cyc
+    inx           ; 2 cyc
+positive:
+.endmacro
+
+; 518 - 828 cyc
+.macro imul16 dest, arg1, arg2
+    copy16 FR0, arg1  ; 12 cyc
+    copy16 FR1, arg2  ; 12 cyc
+    jsr imul16_func   ; 470-780 cyc
+    copy32 dest, FR2  ; 24 cyc
+.endmacro
+
+
+.macro shift_round_16 arg, shift
+    .repeat shift
+        shl32 arg
+    .endrepeat
+    round16 arg
+.endmacro
+
+.macro imul16_round dest, arg1, arg2, shift
+    copy16 FR0, arg1  ; 12 cyc
+    copy16 FR1, arg2  ; 12 cyc
+    jsr imul16_func   ; 470-780 cyc
+    shift_round_16 FR2, shift
+    copy16 dest, FR2 + 2  ; 12 cyc
+.endmacro
+
+; min 470 cycles
+; max 780 cycles
+.proc imul16_func
+    arg1 = FR0   ; 16-bit arg (clobbered)
+    arg2 = FR1   ; 16-bit arg (clobbered)
+    result = FR2 ; 32-bit result
+
+    ldx #0          ; 2 cyc
+    ; counts the number of sign bits in X
+    check_sign arg1 ; 5 to 25 cyc
+    check_sign arg2 ; 5 to 25 cyc
+    
+    ; zero out the 32-bit temp's top 16 bits
+    lda #0          ; 2 cyc
+    sta result + 2  ; 3 cyc
+    sta result + 3  ; 3 cyc
+    ; the bottom two bytes will get cleared by the shifts
+
+    ; unrolled loop for maximum speed, at the cost
+    ; of a larger routine
+    ; 440 to 696 cycles
+    .repeat 16, bitnum
+        ; bitnum < 8: 25 or 41 cycles
+        ; bitnum >= 8: 30 or 46 cycles
+        bitmul16 arg1, arg2, result, bitnum
+    .endrepeat
+
+    ; In case of mixed input signs, return a negative result.
+    cpx #1              ; 2 cyc
+    bne positive_result ; 2 cyc
+    neg32 result        ; 34 cyc
+positive_result:
+
+    rts ; 6 cyc
+.endproc

mandel-core.s

@@ -563,12 +563,13 @@ sqr16_patch_offset = 8
 ; input: arg as u8
 ; output: dest as u16
 ; clobbers a, x
+; 19 cyc
 .macro sqr8 dest, arg
-    ldx arg
-    lda sqr_lobyte,x
-    sta dest
-    lda sqr_hibyte,x
-    sta dest + 1
+    ldx arg           ; 3 cyc
+    lda sqr_lobyte,x  ; 5 cyc
+    sta dest          ; 3 cyc
+    lda sqr_hibyte,x  ; 5 cyc
+    sta dest + 1      ; 3 cyc
 .endmacro
 
 .segment "TABLES"
@@ -770,6 +771,10 @@ inner_loop:
 
 .endproc
 
+; min low-mem: 81 * 4 + 28 * 2 + 10 + 6 = 396 cyc
+; max low-mem: 92 * 4 + 28 * 2 + 50 + 6 = 480 cyc
+; min ext-mem: 51 * 4 + 28 * 2 + 10 + 6 = 276 cyc
+; max low-mem: 70 * 4 + 28 * 2 + 50 + 6 = 392 cyc
 .macro imul16_impl xe
     .local arg1
     .local arg2
@@ -787,32 +792,37 @@ inner_loop:
     ; h1*256*(h2*256 + l2) + l1*(h2*256 + l2)
     ; h1*h2*256*256 + h1*l2*256 + h2*l1*256 + l1*l2
 
-    imul8 result, arg1, arg2, xe
+    imul8 result, arg1, arg2, xe        ; 81-92 or 51-70
 
-    imul8 result + 2, arg1 + 1, arg2 + 1, xe
+    imul8 result + 2, arg1 + 1, arg2 + 1, xe ; 81-92 or 51-70
 
-    imul8 inter, arg1 + 1, arg2, xe
-    add16 result + 1, result + 1, inter
-    add_carry result + 3
+    imul8 inter, arg1 + 1, arg2, xe     ; 81-92 or 51-70
+    add16 result + 1, result + 1, inter ; 20 cyc
+    add_carry result + 3                ; 8 cyc
 
-    imul8 inter, arg1, arg2 + 1, xe
-    add16 result + 1, result + 1, inter
-    add_carry result + 3
+    imul8 inter, arg1, arg2 + 1, xe     ; 81-92 or 51-70
+    add16 result + 1, result + 1, inter ; 20 cyc
+    add_carry result + 3                ; 8 cyc
 
     ; In case of negative inputs, adjust high word
     ; https://stackoverflow.com/a/28827013
-    lda arg1 + 1
-    bpl arg1_pos
-    sub16 result + 2, result + 2, arg2
+    ; 10-50 cycles
+    lda arg1 + 1                       ; 3 cyc
+    bpl arg1_pos                       ; 2 cyc
+    sub16 result + 2, result + 2, arg2 ; 20 cyc
 arg1_pos:
-    lda arg2 + 1
-    bpl arg2_pos
-    sub16 result + 2, result + 2, arg1
+    lda arg2 + 1                       ; 3 cyc
+    bpl arg2_pos                       ; 2 cyc
+    sub16 result + 2, result + 2, arg1 ; 20 cyc
 arg2_pos:
 
     rts ; 6 cyc
 .endmacro
 
+; min base ram: 19 * 2 + 81 + 28 * 2 + 6 = 181
+; max base ram: 19 * 2 + 92 + 28 * 2 + 6 = 192
+; min ext ram: 19 * 2 + 51 + 28 * 2 + 6 = 151
+; max ext ram: 19 * 2 + 70 + 28 * 2 + 6 = 170
 .macro sqr16_impl xe
     .scope
         arg = FR0    ; 16-bit arg (clobbered)
@@ -820,9 +830,9 @@ arg2_pos:
         ;inter = temp2
         inter = FR1
 
-        lda arg + 1
-        bpl arg_pos
-        neg16 arg
+        lda arg + 1  ; 3 cyc
+        bpl arg_pos  ; 2 cyc
+        neg16 arg    ; 18 cyc
     arg_pos:
 
         ; hl * hl
@@ -830,15 +840,15 @@ arg2_pos:
         ; h*256*(h*256 + l) + l*(h*256 + l)
         ; h*h*256*256 + h*l*256 + h*l*256 + l*l
 
-        sqr8 result, arg
+        sqr8 result, arg          ; 19 cyc
 
-        sqr8 result + 2, arg + 1
+        sqr8 result + 2, arg + 1  ; 19 cyc
 
-        imul8 inter, arg + 1, arg, xe
-        add16 result + 1, result + 1, inter
-        add_carry result + 3
-        add16 result + 1, result + 1, inter
-        add_carry result + 3
+        imul8 inter, arg + 1, arg, xe        ; 81-92 / 51-70 cyc
+        add16 result + 1, result + 1, inter  ; 20 cyc
+        add_carry result + 3                 ; 8 cyc
+        add16 result + 1, result + 1, inter  ; 20 cyc
+        add_carry result + 3                 ; 8 cyc
 
         rts ; 6 cyc
     .endscope