Replace the not-enough-precision 32 bit to float impl

keep the proc though to encapsulate it but uses the older
logic of rounding down to 3.13 first
This commit is contained in:
Brooke Vibber 2025-07-03 18:43:10 -07:00
commit f2a6af0995

View file

@ -261,28 +261,6 @@ fixed3_13_as_float: ; float48
.byte $00
.byte $00
u65536_as_float: ; float48
; 1 << 16
; 65536
; 06 55 36 . 00 00
.byte 66 ; exponent/sign - +2 bytes
.byte $06
.byte $55
.byte $36
.byte $00
.byte $00
fixed6_26_as_float: ; float48
; 1 << 26
; 67108864
; 67 10 88 64 . 00
.byte 67 ; exponent/sign - +3 bytes
.byte $67
.byte $10
.byte $88
.byte $64
.byte $00
sec_per_frame: ; float48 00 . 01 66 66 66 67
.byte 63 ; exponent/sign - -1 bytes
.byte $01 ; BCD digits
@ -1016,63 +994,14 @@ common:
.endproc
; rounds to 16-bit first!
; input in FR0, 32 bits signed 6.26 fixed
; output in FR0, Atari float
; clobbers a, x, y, FR0, FR1
.proc fixed6_26_to_float
; check sign bit! conversion routine is for unsigned
lda FR0 + 3
and #$80
sta temp
beq positive
neg32 FR0
positive:
; save low word
lda FR0
pha
lda FR0 + 1
pha
; convert high word
sta FR0 + 2
sta FR1
lda FR0 + 3
sta FR0 + 1
jsr IFP
lda temp
beq positive2
; set float sign bit
lda FR0
ora #$80
sta FR0
positive2:
; high word to FR1
ldx #.lobyte(u65536_as_float)
ldy #.hibyte(u65536_as_float)
jsr FLD1R
jsr FMUL
jsr FMOVE
; convert low word
pla
lda temp + 1
pla
lda temp
jsr IFP
; combine
jsr FADD
; scale
ldx #.lobyte(fixed6_26_as_float)
ldy #.hibyte(fixed6_26_as_float)
jsr FLD1R
jsr FDIV
shift_round_16 FR0, 3
copy16 FR0, FR0 + 2
jsr fixed3_13_to_float
rts
.endproc