Add some timing notes
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1 changed files with 39 additions and 29 deletions
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@ -563,12 +563,13 @@ sqr16_patch_offset = 8
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; input: arg as u8
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; input: arg as u8
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; output: dest as u16
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; output: dest as u16
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; clobbers a, x
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; clobbers a, x
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; 19 cyc
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.macro sqr8 dest, arg
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.macro sqr8 dest, arg
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ldx arg
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ldx arg ; 3 cyc
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lda sqr_lobyte,x
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lda sqr_lobyte,x ; 5 cyc
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sta dest
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sta dest ; 3 cyc
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lda sqr_hibyte,x
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lda sqr_hibyte,x ; 5 cyc
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sta dest + 1
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sta dest + 1 ; 3 cyc
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.endmacro
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.endmacro
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.segment "TABLES"
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.segment "TABLES"
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@ -770,6 +771,10 @@ inner_loop:
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.endproc
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.endproc
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; min low-mem: 81 * 4 + 28 * 2 + 10 + 6 = 396 cyc
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; max low-mem: 92 * 4 + 28 * 2 + 50 + 6 = 480 cyc
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; min ext-mem: 51 * 4 + 28 * 2 + 10 + 6 = 276 cyc
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; max low-mem: 70 * 4 + 28 * 2 + 50 + 6 = 392 cyc
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.macro imul16_impl xe
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.macro imul16_impl xe
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.local arg1
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.local arg1
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.local arg2
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.local arg2
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@ -787,32 +792,37 @@ inner_loop:
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; h1*256*(h2*256 + l2) + l1*(h2*256 + l2)
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; h1*256*(h2*256 + l2) + l1*(h2*256 + l2)
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; h1*h2*256*256 + h1*l2*256 + h2*l1*256 + l1*l2
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; h1*h2*256*256 + h1*l2*256 + h2*l1*256 + l1*l2
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imul8 result, arg1, arg2, xe
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imul8 result, arg1, arg2, xe ; 81-92 or 51-70
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imul8 result + 2, arg1 + 1, arg2 + 1, xe
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imul8 result + 2, arg1 + 1, arg2 + 1, xe ; 81-92 or 51-70
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imul8 inter, arg1 + 1, arg2, xe
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imul8 inter, arg1 + 1, arg2, xe ; 81-92 or 51-70
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add16 result + 1, result + 1, inter
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add16 result + 1, result + 1, inter ; 20 cyc
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add_carry result + 3
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add_carry result + 3 ; 8 cyc
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imul8 inter, arg1, arg2 + 1, xe
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imul8 inter, arg1, arg2 + 1, xe ; 81-92 or 51-70
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add16 result + 1, result + 1, inter
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add16 result + 1, result + 1, inter ; 20 cyc
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add_carry result + 3
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add_carry result + 3 ; 8 cyc
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; In case of negative inputs, adjust high word
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; In case of negative inputs, adjust high word
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; https://stackoverflow.com/a/28827013
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; https://stackoverflow.com/a/28827013
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lda arg1 + 1
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; 10-50 cycles
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bpl arg1_pos
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lda arg1 + 1 ; 3 cyc
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sub16 result + 2, result + 2, arg2
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bpl arg1_pos ; 2 cyc
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sub16 result + 2, result + 2, arg2 ; 20 cyc
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arg1_pos:
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arg1_pos:
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lda arg2 + 1
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lda arg2 + 1 ; 3 cyc
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bpl arg2_pos
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bpl arg2_pos ; 2 cyc
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sub16 result + 2, result + 2, arg1
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sub16 result + 2, result + 2, arg1 ; 20 cyc
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arg2_pos:
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arg2_pos:
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rts ; 6 cyc
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rts ; 6 cyc
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.endmacro
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.endmacro
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; min base ram: 19 * 2 + 81 + 28 * 2 + 6 = 181
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; max base ram: 19 * 2 + 92 + 28 * 2 + 6 = 192
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; min ext ram: 19 * 2 + 51 + 28 * 2 + 6 = 151
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; max ext ram: 19 * 2 + 70 + 28 * 2 + 6 = 170
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.macro sqr16_impl xe
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.macro sqr16_impl xe
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.scope
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.scope
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arg = FR0 ; 16-bit arg (clobbered)
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arg = FR0 ; 16-bit arg (clobbered)
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@ -820,9 +830,9 @@ arg2_pos:
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;inter = temp2
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;inter = temp2
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inter = FR1
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inter = FR1
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lda arg + 1
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lda arg + 1 ; 3 cyc
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bpl arg_pos
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bpl arg_pos ; 2 cyc
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neg16 arg
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neg16 arg ; 18 cyc
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arg_pos:
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arg_pos:
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; hl * hl
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; hl * hl
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@ -830,15 +840,15 @@ arg2_pos:
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; h*256*(h*256 + l) + l*(h*256 + l)
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; h*256*(h*256 + l) + l*(h*256 + l)
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; h*h*256*256 + h*l*256 + h*l*256 + l*l
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; h*h*256*256 + h*l*256 + h*l*256 + l*l
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sqr8 result, arg
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sqr8 result, arg ; 19 cyc
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sqr8 result + 2, arg + 1
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sqr8 result + 2, arg + 1 ; 19 cyc
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imul8 inter, arg + 1, arg, xe
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imul8 inter, arg + 1, arg, xe ; 81-92 / 51-70 cyc
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add16 result + 1, result + 1, inter
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add16 result + 1, result + 1, inter ; 20 cyc
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add_carry result + 3
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add_carry result + 3 ; 8 cyc
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add16 result + 1, result + 1, inter
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add16 result + 1, result + 1, inter ; 20 cyc
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add_carry result + 3
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add_carry result + 3 ; 8 cyc
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rts ; 6 cyc
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rts ; 6 cyc
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.endscope
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.endscope
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